Volume:5 Issue:2 Feb ' 2019
||VLSI IMPLEMENTATION OF UNIVERSAL SERIAL BUS NRZI ENCODING AND DECODING
VLSI IMPLEMENTATION OF UNIVERSAL SERIAL BUS NRZI ENCODING AND DECODING
In this paper the hardware design approach for implementing of universal serial bus NRZI encoding and decoding in chip. .Communication plays an important role in day to day life. The information or data is transmitted through various techniques and line coding is one of the finest techniques for sending data. The selection of these techniques depends on the bandwidth requirement, DC level, bit error rate performance and the inbuilt error detection property. In this line coding techniques whose encoder and decoder have been designed and analyzed are NRZI, NRZI coding technique can be access with the mode of selection. Switching activity is the one of the main factors that is responsible for the dynamic power dissipation. Power consumption by the encoders and decoders is directly proportional to switching activity. To optimize the power of the universal serial bus encoder – decoder, Shift coding scheme is applied that circularly shifts the data to minimize the transition. . Verilog programming language is used for the coding and the final design will be downloaded to the Xilinx-Spartan3 FPGA toolkit.